High Speed CMOS VLSI Design Lecture 4 : Interconnect RC ( c ) 1997
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چکیده
Once upon a time, the delay of a circuit was well approximated as the sum of the delays of the gates. Wires could be viewed as equipotential nodes that instantly carried the voltage to all ends. As transistors have shrunk, the relative delay of gates has decreased. At the same time, the delay of wires per unit length has actually increased. Thus, wires now are a very important part of total delay.
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تاریخ انتشار 1997